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ltc2914 1 2914fa quad uv/ov positive/negative voltage monitor n desktop and notebook computers n network servers n core, i/o voltage monitors n monitors four voltages simultaneously n adjustable uv and ov trip values n guaranteed threshold accuracy: 1.5% of monitored voltage over temperature n input glitch rejection n monitors up to two negative voltages n buffered 1v reference output n adjustable reset timeout with timeout disable n 62a quiescent current n open-drain ov and uv outputs n guaranteed ov and uv for v cc 1v n available in 16-lead ssop and 16-lead (5mm 3mm) dfn packages quad uv/ov supply monitor,10% tolerance, 5v, 3.3v, 2.5v, 1.8v the ltc ? 2914 is a quad input voltage monitor intended for monitoring multiple voltages in a variety of applications. dual inputs for each monitored voltage allow monitoring four separate undervoltage (uv) conditions and four separate overvoltage (ov) conditions. all monitors share a common undervoltage output and a common overvoltage output. the ltc2914-1 has latching capability for the overvoltage output. the ltc2914-2 has functionality to disable both the overvoltage and undervoltage outputs. polarity selection and a buffered reference allow monitoring up to two separate negative voltages. a three-state input pin allows setting the polarity of two inputs without requiring any external components. glitch ? ltering ensures reliable reset operation without false or noisy triggering. the ltc2914 provides a precise, versatile, space-con- scious, micropower solution for voltage monitoring. input threshold voltage vs temperature typical application features applications description l , lt, ltc and ltm are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. vh1 v cc ltc2914-1 system 2914 ta01a 0.1 f gnd tmr vl1 vl2 vh2 ref vl3 vh3 ov uv latch sel vl4 c tmr 22nf timeout = 200ms vh4 1k 4.53k 4.53k 12.4k 1k 19.6k 4.53k 27.4k 1k 44.2k 5v 3.3v 2.5v 1.8v 1k 4.53k p0wer supplies temperature ( c) C50 0.495 threshold voltage, v out (v) 0.497 0.499 0.501 C25 0 25 50 2914 ta01b 75 0.503 0.505 0.496 0.498 0.500 0.502 0.504 100
ltc2914 2 2914fa terminal voltages v cc (note 3) ............................................. ?0.3v to 6v ov, uv ................................................... ?0.3v to 16v tmr .......................................... ?0.3v to (v cc + 0.3v) vln, vhn, latch , dis, sel .................. ?0.3v to 7.5v terminal currents i vcc ....................................................................10ma reference load current (i ref ) ...........................1ma i uv , i ov ...............................................................10ma (notes 1, 2) 16 15 14 13 12 11 10 9 17 1 2 3 4 5 6 7 8 v cc tmr sel latch uv ov ref gnd vh1 vl1 vh2 vl2 vh3 vl3 vh4 vl4 top view dhc package 16-lead (5mm 3mm) plastic dfn t jmax = 150c, e ja = 43.5c/w exposed pad (pin 17) pcb gnd connection optional gn package 16-lead plastic ssop 1 2 3 4 5 6 7 8 top view 16 15 14 13 12 11 10 9 vh1 vl1 vh2 vl2 vh3 vl3 vh4 vl4 v cc tmr sel latch uv ov ref gnd t jmax = 150c, e ja = 110c/w order part number dhc part marking* ltc2914cdhc-1 ltc2914idhc-1 ltc2914hdhc-1 29141 29141 29141 order part number gn part marking ltc2914cgn-1 ltc2914ign-1 ltc2914hgn-1 29141 2914i1 2914h1 16 15 14 13 12 11 10 9 17 1 2 3 4 5 6 7 8 v cc tmr sel dis uv ov ref gnd vh1 vl1 vh2 vl2 vh3 vl3 vh4 vl4 top view dhc package 16-lead ( 5mm 3mm ) plastic dfn t jmax = 150c, e ja = 43.5c/w exposed pad (pin 17) pcb gnd connection optional gn package 16-lead plastic ssop 1 2 3 4 5 6 7 8 top view 16 15 14 13 12 11 10 9 vh1 vl1 vh2 vl2 vh3 vl3 vh4 vl4 v cc tmr sel dis uv ov ref gnd t jmax = 150c, e ja = 110c/w order part number dhc part marking* ltc2914cdhc-2 ltc2914idhc-2 ltc2914hdhc-2 29142 29142 29142 order part number gn part marking ltc2914cgn-2 ltc2914ign-2 ltc2914hgn-2 29142 2914i2 2914h2 order options tape and reel: add #tr lead free: add #pbf lead free tape and reel: add #trpbf lead free part marking: http://www.linear.com/leadfree/ *the temperature grade is identi? ed by a label on the shipping container. operating temperature range ltc2914c ................................................ 0c to 70c ltc2914i.............................................. ?40c to 85c ltc2914h .......................................... ?40c to 125c storage temperature range ................... ?65c to 150c lead temperature (soldering, 10 sec) ssop ................................................................ 300c absolute maximum ratings package/order information
ltc2914 3 2914fa the l denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. v cc = 3.3v, vln = 0.45v, vhn = 0.55v, latch = v cc , sel = v cc , dis = open unless otherwise noted. (note 2) symbol parameter conditions min typ max units v shunt v cc shunt regulator voltage i cc = 5ma l 6.2 6.6 6.9 v C40oc < t a < 125oc l 6.2 6.6 7.0 v v shunt v cc shunt regulator load regulation i cc = 2ma to 10ma l 200 300 mv v cc supply voltage (note 3) l 2.3 v shunt v v ccr(min) minimum v cc output valid dis = 0v l 1v v cc(uvlo) supply undervoltage lockout v cc rising, dis = 0v l 1.9 2 2.1 v v cc(uvhyst) supply undervoltage lockout hysteresis dis = 0v l 52550 mv i cc supply current v cc = 2.3v to 6v l 62 100 a v ref reference output voltage i vref = 1ma l 0.985 1 1.015 v C40oc < t a < 125oc l 0.985 1 1.020 v v uot undervoltage/overvoltage voltage threshold l 492 500 508 mv t uod undervoltage/overvoltage voltage threshold to output delay vhn = v uot C 5mv or vln = v uot + 5mv l 50 125 500 s i vhl vhn, vln input current l 15 na C40oc < t a < 125oc l 30 na t uoto uv / ov time-out period c tmr = 1nf l 6 8.5 12.5 ms C40oc < t a < 125oc l 6 8.5 14 ms v latch (ih) ov latch clear input high l 1.2 v v latch (il) ov latch clear threshold input low l 0.8 v i latch latch input current v latch > 0.5v l 1 a v dis(ih) dis input high l 1.2 v v dis(il) dis input low l 0.8 v i dis dis input current v dis > 0.5v l 123 a i tmr(up) tmr pull-up current v tmr = 0v l C1.3 C2.1 C2.8 a C40oc < t a < 125oc l C1.2 C2.1 C2.8 a i tmr(down) tmr pull-down current v tmr = 1.6v l 1.3 2.1 2.8 a C40oc < t a < 125oc l 1.2 2.1 2.8 a v tmr(dis) timer disable voltage referenced to v cc l C180 C270 mv v oh output voltage high uv / ov v cc = 2.3v, i uv / ov = C1a l 1v v ol output voltage low uv / ov v cc = 2.3v, i uv / ov = 2.5ma v cc = 1v, i uv = 100a l l 0.1 0.01 0.3 0.15 v v three-state input sel v il low level input voltage l 0.4 v v ih high level input voltage l 1.4 v v z pin voltage when left in hi-z state i sel = 10a l 0.7 0.9 1.1 v C40oc < t a < 125oc l 0.6 0.9 1.2 v i sel sel high, low input current l 25 a i sel(max) maximum sel input current sel tied to either v cc or gnd l 30 a electrical characteristics
ltc2914 4 2914fa input threshold voltage vs temperature supply current vs temperature v cc shunt voltage vs temperature vhn monitor timing vln monitor timing vhn monitor timing (tmr pin strapped to v cc ) vln monitor timing (tmr pin strapped to v cc ) note: when an input is configured as a negative supply monitor, vhn will trigger an ov condition and vln will trigger a uv condition speci? cations are at t a = 25c, v cc = 3.3v unless otherwise noted. note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: all currents into pins are positive; all voltages are referenced to gnd unless otherwise noted. note 3: v cc maximum pin voltage is limited by input current. since the v cc pin has an internal 6.5v shunt regulator, a low impedance supply that exceeds 6v may exceed the rated terminal current. operation from higher voltage supplies requires a series dropping resistor. see applications information. electrical characteristics tiiming diagrams typical performance characteristics vhn uv v uot 1v t uod t uoto 2914 td01 vln ov v uot 1v t uod t uoto 2914 td02 vhn uv v uot 1v t uod t uod 2914 td03 vln ov v uot 1v t uod t uod 2914 td04 temperature ( c) C50 0.495 threshold voltage, v out (v) 0.497 0.499 0.501 C25 0 25 50 2914 g01 75 0.503 0.505 0.496 0.498 0.500 0.502 0.504 100 temperature ( c) C50 50 75 C25 25 40 i cc ( a) 50 55 45 60 0 2914 g02 100 75 70 65 v cc = 5v v cc = 3.3v v cc = 2.3v temperature ( c) C50 6.2 v cc (v) 6.3 6.4 6.5 6.6 6.8 C25 02550 2914 g03 75 100 6.7 200 a 1ma 2ma 5ma 10ma
ltc2914 5 2914fa v cc shunt voltage vs i cc buffered reference voltage vs temperature transient duration vs comparator overdrive uv output voltage vs v cc uv / ov voltage output low vs output sink current reset timeout period vs capacitance uv , i sink vs v cc reset timeout period vs temperature uv output voltage vs v cc speci? cations are at t a = 25c, v cc = 3.3v unless otherwise noted. typical performance characteristics i cc (ma) C2 0 6.25 v cc (v) 6.45 6.75 2 6 8 2914 g04 6.35 6.65 6.55 4 10 12 25 c C40 c 85 c temperature ( c) C50 0.995 reference voltage, v ref (v) 0.997 0.999 1.001 C25 0 25 50 2914 g05 75 1.003 1.005 0.996 0.998 1.000 1.002 1.004 100 comparator overdrive past threshold (%) 0.1 400 typical transient duration ( s) 500 600 700 1 10 100 2914 g06 300 200 100 0 v cc = 6v reset occurs above curve v cc = 2.3v temperature ( c) C50 6 uv/ov timeout period, t uoto (ms) 7 8 9 10 12 C25 02550 2914 g07 75 100 11 c tmr = 1nf supply voltage, v cc (v) 0 uv voltage (v) 0.4 0.6 0.8 2914 g08 0.2 0 0.2 0.4 0.6 1.0 0.8 v cc uv with 10k pull-up uv without 10k pull-up supply voltage, v cc (v) 0 uv voltage (v) 3 4 5 4 2914 g09 2 1 0 1 2 3 5 vhn = 0.55v sel = v cc supply voltage, v cc (v) 0 pull-down current, i uv (ma) 3 4 5 4 2914 g10 2 1 0 1 2 3 5 vhn = 0.45v sel = v cc uv at 150mv uv at 50mv i uv / ov (ma) 0 0 uv / ov , v ol (v) 0.2 0.4 0.6 0.8 1.0 5 10 15 20 2914 g11 25 30 85 c C40 c 25 c tmr pin capacitance, c tmr (nf) 10 uv / ov timeout period, t uoto (ms) 100 1000 10000 0.1 10 100 1000 2914 g12 1 1
ltc2914 6 2914fa dis (pin 13, ltc2914-2): output disable input. disables the ov and uv output pins. when dis is pulled high, the ov and uv pins are not asserted except during a uvlo condition. pin has a weak (2a) internal pull-down to gnd. leave pin open if unused. exposed pad (pin 17, dfn package): exposed pad may be left open or connected to device ground. gnd (pin 9): device ground latch (pin 13, ltc2914-1): ov latch clear/bypass input. when pulled low, ov is latched when asserted. when pulled high, ov latch is cleared. while held high, ov has the same delay and output characteristics as uv . ov (pin 11): overvoltage logic output. asserts low when any positive polarity input voltage is above threshold or any negative polarity input voltage is below threshold. latched low (ltc2914-1). held low for an adjustable delay time after all inputs are valid (ltc2914-2). pin has a weak pull-up to v cc and may be pulled above v cc using an external pull-up. leave pin open if unused. ref (pin 10): buffered reference output. 1v reference used for the offset of negative-monitoring applications. the buffered reference sources and sinks up to 1ma. the reference drives capacitive loads up to 1nf. larger capacitive loads may cause instability. leave pin open if unused. sel (pin 14): input polarity select three-state input. connect to v cc , gnd or leave unconnected in open state to select one of three possible input polarity combinations (refer to table 1). t mr (pin 15): reset delay timer. attach an external capacitor (c tmr ) of at least 10pf to gnd to set a reset delay time of 9ms/nf. a 1nf capacitor will generate an 8.5ms reset delay time. tie pin to v cc to bypass timer. uv (pin 12): undervoltage logic output. asserts low when any positive polarity input voltage is below threshold or any negative polarity input voltage is above threshold. held low for an adjustable delay time after all voltage inputs are valid. pin has a weak pull-up to v cc and may be pulled above v cc using an external pull-up. leave pin open if unused. v cc (pin 16): supply voltage. bypass this pin to gnd with a 0.1f (or greater) capacitor. operates as a direct supply input for voltages up to 6v. operates as a shunt regulator for supply voltages greater than 6v and must have a resistance between the pin and the supply to limit input current to no greater than 10ma. when used without a current-limiting resistance, pin voltage must not exceed 6v. vh1/vh2 (pin 1/pin 3): voltage high inputs 1 and 2. when the voltage on this pin is below 0.5v, an undervoltage condition is triggered. tie pin to v cc if unused. vh3/vh4 (pin 5/pin 7): voltage high inputs 3 and 4. the polarity of the input is selected by the state of the sel pin (refer to table 1). when the monitored input is con? gured as a positive voltage, an undervoltage condition is trig- gered when the pin is below 0.5v. when the monitored input is con? gured as a negative voltage, an overvoltage condition is triggered when the pin is below 0.5v. tie pin to v cc if unused. vl1/vl2 (pin 2/pin 4): voltage low inputs 1 and 2. when the voltage on this pin is above 0.5v, an overvoltage condi- tion is triggered. tie pin to gnd if unused. vl3/vl4 (pin 6/pin 8): voltage low inputs 3 and 4. the polarity of the input is selected by the state of the sel pin (refer to table 1). when the monitored input is con? gured as a positive voltage, an overvoltage condition is triggered when the pin is above 0.5v. when the monitored input is con? gured as a negative voltage, an undervoltage condi- tion is triggered when the pin is above 0.5v. tie pin to gnd if unused. pin functions
ltc2914 7 2914fa block diagram 8 + C + C vl4 10 ref 1v 0.5v buffer sel 7 vh4 6 + C + C vl3 + C 4 vl2 3 + C vh2 + C 2 vl1 1 + C vh1 5 vh3 + C uvlo uvlo 2v v cc + C 1v ltc2914-1 ltc2914-2 v cc three-state polarity decoder ov pulse generator disable ov latch clear/bypass 14 tmr v cc 15 ov 11 latch 13 gnd 2914 -1 bd 9 16 uv pulse generator oscillator v cc 400k uv 12 400k + C 1v dis 13 2 a
ltc2914 8 2914fa voltage monitoring the ltc2914 is a low power quad voltage monitoring cir- cuit with four undervoltage and four overvoltage inputs. a timeout period that holds ov or uv asserted after all faults have cleared is adjustable using an external capacitor and is externally disabled. each voltage monitor has two inputs (vhn and vln) for detecting undervoltage and overvoltage conditions. when con? gured to monitor a positive voltage v n using the 3-resistor circuit con? guration shown in figure 1, v hn is connected to the high-side tap of the resistive divider and vln is connected to the low-side tap of the resistive divider. if an input is con? gured as a negative voltage monitor, the outputs uv n and ov n in figure 1 are swapped internally. v n is then connected as shown in figure 2. note, vhn is still connected to the high-side tap and vln is still connected to the low-side tap. polarity selection the three-state polarity-select pin (sel) selects one of three possible polarity combinations for the input thresholds, as described in table 1. when an input is con? gured for negative supply monitoring, vhn is con? gured to trigger an overvoltage condition and vln is con? gured to trigger an undervoltage condition. with this con? guration, an ov con- dition occurs when the supply voltage is more negative than the con? gured threshold and a uv condition occurs when the voltage is less negative than the con? gured threshold. the three-state input pin sel is connected to gnd, v cc or left unconnected during normal operation. when the pin is left unconnected, the maximum leakage allowed from the pin is 10a to ensure it remains in the open state. table 1 shows the three possible selections of polarity based on the sel pin connection. table 1. voltage polarity programming (v uot = 0.5v typical) sel v3 input v4 input v cc positive vh3 < v uot uv vl3 > v uot ov positive vh4 < v uot uv vl4 > v uot ov open positive vh3 < v uot uv vl3 > v uot ov negative vh4 < v uot ov vl4 > v uot uv gnd negative vh3 < v uot ov vl3 > v uot uv negative vh4 < v uot ov vl4 > v uot uv 3-step design procedure the following 3-step design procedure allows selecting appropriate resistances to obtain the desired uv and ov trip points for the positive voltage monitor circuit in figure 1 and the negative voltage monitor circuit in figure 2. figure 1. 3-resistor positive uv/ov monitoring con? guration figure 2. 3-resistor negative uv/ov monitoring con? guration applications information C + C + + C 0.5v ltc2914 uv n vhn r c r b r a 2914 f01 v n vln ov n C + C + + C + C 0.5v 1v ltc2914 uv n vhn ref r a r b r c 2914 f02 vln v n ov n C +
ltc2914 9 2914fa for positive supply monitoring, v n is the desired nominal operating voltage, i n is the desired nominal current through the resistive divider, v ov is the desired overvoltage trip point and v uv is the desired undervoltage trip point. for negative supply monitoring, to compensate for the 1v reference, 1v must be subtracted from v n , v ov and v uv before using each in the following equations. 1. choose r a to obtain the desired ov trip point r a is chosen to set the desired trip point for the overvoltage monitor. r a = 0.5v i n ? v n v o v (1) 2. choose r b to obtain the desired uv trip point once r a is known, r b is chosen to set the desired trip point for the undervoltage monitor. r b = 0.5v i n ? v n v u v ?r a (2) 3. choose r c to complete the design once r a and r b are known, r c is determined by: r c = v n i n ?r a ?r b (3) if any of the variables v n , i n , v uv or v ov change, then each step must be recalculated. positive voltage monitor example a positive voltage monitor application is shown in figure 3. the monitored voltage is a 5v 10% supply. nominal cur- rent in the resistive divider is 10a. 1. find r a to set the ov trip point of the monitor. r a = 0.5v 10 a ? 5v 5.5 v 45.3k 2. find r b to set the uv trip point of the monitor. r b = 0.5v 10 a ? 5v 4.5 v ? 45.3k 10.2k 3. determine r c to complete the design. r c = 5v 10 a ? 45.3k 10.2k 442k negative voltage monitor example a negative voltage monitor application is shown in figure 4. the monitored voltage is a C5v 10% supply. nominal current in the resistive divider is 10a. for the negative case, 1v is subtracted from v n , v ov and v uv . 1. find r a to set the ov trip point of the monitor. r a = 0.5v 10 a ? ?5v ? 1v ?5.5v ? 1 v 46.4k 2. find r b to set the uv trip point of the monitor. r b = 0.5v 10 a ? 5v ? 1v 4.5v ? 1 v 46.4k 8.45k 3. determine r c to complete the design. r c = ?5v ? 1v 10 a 46.4k 8.45k 549k figure 3. positive supply monitor figure 4. negative supply monitor applications information vh1 r c 442k r b 10.2k r a 45.3k v cc gnd ltc2914 vl1 2914 f03 ov uv sel v cc 5v v1 5v 10% ref r a 46.4k r b 8.45k r c 549k v cc gnd v3 C5v 10% ltc2914 vh3 vl3 2914 f04 ov uv sel v cc 5v
ltc2914 10 2914fa power-up/power-down as soon as v cc reaches 1v during power-up, the uv output asserts low and the ov output weakly pulls to v cc . the ltc2914 is guaranteed to assert uv low and ov high under conditions of low v cc , down to v cc = 1v. above v cc = 2v (2.1v maximum) the vh and vl inputs take control. once all vh inputs and v cc become valid an internal timer is started. after an adjustable delay time, uv weakly pulls high. threshold accuracy reset threshold accuracy is important in a supply-sensitive system. ideally, such a system resets only if supply voltages fall outside the exact thresholds for a speci? ed margin. all ltc2914 inputs have a relative threshold accuracy of 1.5% over the full operating temperature range. for example, when the ltc2914 is programmed to moni- tor a 5v input with a 10% tolerance, the desired uv trip point is 4.5v. because of the 1.5% relative accuracy of the ltc2914, the uv trip point is between 4.433v and 4.567v which is 4.5v 1.5%. likewise, the accuracy of the resistances chosen for r a , r b and r c affect the uv and ov trip points as well. us- ing the example just given, if the resistances used to set the uv trip point have 1% accuracy, the uv trip range is between 4.354v and 4.650v. this is illustrated in the fol- lowing calculations. the uv trip point is given as: v uv = 0.5v 1 + r c r a + r b the two extreme conditions, with a relative accuracy of 1.5% and resistance accuracy of 1%, result in: v uv(min) = 0.5v ? 0.985 ? 1 + r c ? 0.99 r a + r b () ? 1.01 and v uv(max) = 0.5v ? 1.015 ? 1 + r c ? 1.01 r a + r b () ? 0.99 for a desired trip point of 4.5v, r c r a + r b = 8 therefore, v uv(min) = 0.5v ? 0.985 ? 1 + 8 0.99 1.01 = 4.354v and v uv(max) = 0.5v ? 1.015 ? 1 + 8 1.01 0.99 = 4.650v glitch immunity in any supervisory application, noise riding on the moni- tored dc voltage causes spurious resets. to solve this problem without adding hysteresis, which causes a new error term in the trip voltage, the ltc2914 lowpass ? lters the output of the ? rst stage comparator at each input. this ? lter integrates the output of the comparator before as- serting the uv or ov logic. a transient at the input of the comparator of suf? cient magnitude and duration triggers the output logic. the typical performance characteristics section shows a graph of the transient duration vs com- parator overdrive. applications information
ltc2914 11 2914fa uv/ov timing the ltc2914 has an adjustable timeout period (t uoto ) that holds ov or uv asserted after all faults have cleared. this assures a minimum reset pulse width allowing a settling time delay for the monitored voltage after it has entered the valid region of operation. when any vh input drops below its designed threshold, the uv pin asserts low. when all inputs recover above their designed thresholds, the uv output timer starts. if all inputs remain above their designed thresholds when the timer ? nishes, the uv pin weakly pulls high. however, if any input falls below its designed threshold during this time-out period, the timer resets and restarts when all inputs are above the designed thresholds. the ov output behaves as the uv output when latch is high (ltc2914-1). selecting the uv/ov timing capacitor the uv and ov timeout period (t uoto ) for the ltc2914 is adjustable to accommodate a variety of applications. connecting a capacitor, c tmr , between the tmr pin and ground sets the timeout period. the value of capacitor needed for a particular timeout period is: c tmr = t uoto ? 115 ? 10 C9 (f/s) the reset timeout period vs capacitance graph found in the typical performance characteristics shows the desired delay time as a function of the value of the timer capacitor that must be used. the tmr pin must have a minimum of 10pf or be tied to v cc . for long timeout periods, the only limitation is the availability of a large value capacitor with low leakage. capacitor leakage current must not exceed the minimum tmr charging current of 1.3a. tying the tmr pin to v cc bypasses the timeout period. undervoltage lockout when v cc falls below 2v, the ltc2914 asserts an undervoltage lockout (uvlo) condition. during uvlo, uv is asserted and pulled low while ov is cleared and blocked from asserting. when v cc rises above 2v, uv follows the same timing procedure as an undervoltage condition on any input. shunt regulator the ltc2914 has an internal shunt regulator. the v cc pin operates as a direct supply input for voltages up to 6v. under this condition, the quiescent current of the device remains below a maximum of 100a. for v cc voltages higher than 6v, the device operates as a shunt regulator and must have a resistance r z between the supply and the v cc pin to limit the current to no greater than 10ma. when choosing this resistance value, choose an appropriate location on the i-v curve shown in the typical performance characteristics section to accommodate variations in v cc due to changes in current through r z . uv and ov output characteristics the dc characteristics of the uv and ov pull-up and pull-down strength are shown in the typical performance characteristics section. each pin has a weak internal pull-up to v cc and a strong pull-down to ground. this arrangement allows these pins to have open-drain behavior while pos- sessing several other bene? cial characteristics. the weak pull-up eliminates the need for an external pull-up resistor when the rise time on the pin is not critical. on the other hand, the open-drain con? guration allows for wired-or connections and is useful when more than one signal needs to pull down on the output. v cc of 1v guarantees a maximum v ol = 0.15v at uv . applications information
ltc2914 12 2914fa at v cc = 1v, the weak pull-up current on ov is barely turned on. therefore, an external pull-up resistor of no more than 100k is recommended on the ov pin if the state and pull-up strength of the ov pin is crucial at very low v cc . note however, by adding an external pull-up resistor, the pull-up strength on the ov pin is increased. therefore, if it is connected in a wired-or connection, the pull-down strength of any single device must accommodate this additional pull-up strength. output rise and fall time estimation the uv and ov outputs have strong pull-down capabil- ity. the following formula estimates the output fall time (90% to 10%) for a particular external load capacitance (c load ): t fall 2.2 ? r pd ? c load where r pd is the on-resistance of the internal pull-down transistor, typically 50 at v cc > 1v and at room tem- perature (25c). c load is the external load capacitance on the pin. assuming a 150pf load capacitance, the fall time is 16.5ns. the rise time on the uv and ov pins is limited by a 400k pull-up resistance to v cc . a similar formula estimates the output rise time (10% to 90%) at the uv and ov pins: t rise 2.2 ? r pu ? c load where r pu is the pull-up resistance. ov latch (ltc2914-1) with the latch pin held low, the ov pin latches low when an ov condition is detected. the latch is cleared by raising the latch pin high. if an ov condition clears while latch is held high, the latch is bypassed and the ov pin behaves the same as the uv pin with a similar timeout period at the output. if latch is pulled low while the timeout period is active, the ov pin latches as before. disable (ltc2914-2) the ltc2914-2 allows disabling the uv and ov outputs via the dis pin. pulling dis high forces both outputs to remain weakly pulled high, regardless of any faults that occur on the inputs. however, if a uvlo condition oc- curs, uv asserts and pulls low, but the timeout function is bypassed. uv pulls high as soon as the uvlo condition is cleared. dis has a weak 2a (typical) internal pull-down current guaranteeing normal operation with the pin left open. applications information
ltc2914 13 2914fa quad uv/ov supply monitor, 10% tolerance, 5v, 3.3v, 2.5v, 1.8v dual positive and dual negative uv/ov supply monitor, 10% tolerance, 5v, 3.3v, C5v, C3.3v typical applications vh1 11 16 12 13 14 1 2 3 4 10 5 6 7 8 15 9 v cc ltc2914-1 system 2914 ta02 c byp 0.1 f gnd tmr vl1 vl2 vh2 ref vl3 vh3 ov uv latch sel vl4 c tmr 22nf timeout = 200ms vh4 r b4 1k r a3 4.53k r a4 4.53k r c4 12.4k r b3 1k r c3 19.6k r a2 4.53k r c2 27.4k r b1 1k r c1 44.2k 5v 3.3v 2.5v 1.8v r b2 1k r a1 4.53k p0wer supplies vh1 11 16 12 13 14 1 2 3 4 10 5 6 7 8 15 9 v cc ltc2914-1 system 2914 ta03 c byp 0.1 f gnd tmr vl1 vl2 vh2 ref vl3 vh3 ov uv latch sel vl4 c tmr 2.2nf timeout = 20ms vh4 r b4 768 r c3 54.9k r c4 37.4k r a4 4.64k r b3 845 r a3 4.64k r a2 4.53k r c2 27.4k r b1 1k r c1 44.2k 5v 3.3v C3.3v C5v r b2 1k r a1 4.53k p0wer supplies
ltc2914 14 2914fa triple uv/ov supply monitor powered from 48v, 10% tolerance, 48v, 5v, 2.5v vh1 11 15 16 12 13 14 1 2 3 4 10 5 6 7 8 9 v cc ltc2914-1 system 2914 ta04 c byp 0.1 f gnd vl1 vl2 vh2 ref vl3 vh3 ov tmr uv latch sel vl4 vh4 r a3 4.53k r b3 1k r c3 19.6k r a2 4.53k r c2 44.2k r b1 1k r c1 475k r z 8.25k 48v 5v 2.5v r b2 1k r a1 4.53k p0wer supplies
ltc2914 15 2914fa inform a tion furnished by line a r technology corpor a tion is believed to be a ccur a te a nd reli a ble. however, no responsibility is a ssumed for its use. line a r technology corpor a tion m a kes no represen- t a tion th a t the interconnection of its circuits a s described herein will not infringe on existing p a tent rights. dhc package 16-lead plastic dfn (5mm 3mm) (reference ltc dwg # 05-08-1706) gn package 16-lead plastic ssop (narrow .150 inch) (reference ltc dwg # 05-08-1641) 3.00 0.10 (2 sides) 5.00 0.10 (2 sides) note: 1. drawing proposed to be made variation of version (wjed-1) in jedec package outline mo-229 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package 0.40 0.10 bottom view?exposed pad 1.65 0.10 (2 sides) 0.75 0.05 r = 0.115 typ r = 0.20 typ 4.40 0.10 (2 sides) 1 8 16 9 pin 1 top mark (see note 6) 0.200 ref 0.00 ? 0.05 (dhc16) dfn 1103 0.25 0.05 pin 1 notch 0.50 bsc 4.40 0.05 (2 sides) recommended solder pad pitch and dimensions 1.65 0.05 (2 sides) 2.20 0.05 0.50 bsc 0.65 0.05 3.50 0.05 package outline 0.25 0.05 gn16 (ssop) 0204 12 3 4 5 6 7 8 .229 ? .244 (5.817 ? 6.198) .150 ? .157** (3.810 ? 3.988) 16 15 14 13 .189 ? .196* (4.801 ? 4.978) 12 11 10 9 .016 ? .050 (0.406 ? 1.270) .015 .004 (0.38 0.10) 45 0 ? 8 typ .007 ? .0098 (0.178 ? 0.249) .0532 ? .0688 (1.35 ? 1.75) .008 ? .012 (0.203 ? 0.305) typ .004 ? .0098 (0.102 ? 0.249) .0250 (0.635) bsc .009 (0.229) ref .254 min recommended solder pad layout .150 ? .165 .0250 bsc .0165 .0015 .045 .005 *dimension does not include mold flash. mold flash shall not exceed 0.006" (0.152mm) per side **dimension does not include interlead flash. interlead flash shall not exceed 0.010" (0.254mm) per side inches (millimeters) note: 1. controlling dimension: inches 2. dimensions are in 3. drawing not to scale package description
ltc2914 16 2914fa linear technology corporation 1630 mcc a rthy blvd., milpit a s, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.line a r.com ? linear technology corporation 2006 lt 1007 rev a ? printed in usa quad uv/ov supply monitor with led undervoltage and overvoltage indicator and manual undervoltage reset button, 10% tolerance, 12v, 5v, 3.3v, 2.5v part number description comments ltc1326/ ltc1326-2.5 micropower precision triple supply monitor for 5v/2.5v, 3.3v and adj 4.725v, 3.118v, 1v threshold (0.75%) ltc1726-2.5/ ltc1726-5 micropower triple supply monitor for 2.5v/5v, 3.3v and adj adjustable reset and watchdog time-outs ltc1727-2.5/ ltc1727-5 micropower triple supply monitor with open-drain reset individual monitor outputs in msop ltc1728-1.8/ ltc1728-3.3 micropower triple supply monitor with open-drain reset 5-lead sot-23 package ltc1728-2.5/ ltc1728-5 micropower triple supply monitor with open-drain reset 5-lead sot-23 package ltc1985-1.8 micropower triple supply monitor with push-pull reset 5-lead sot-23 package ltc2900 programmable quad supply monitor adjustable reset, 10-lead msop and 3mm x 3mm 10-lead dfn package ltc2901 programmable quad supply monitor adjustable reset and watchdog timer, 16-lead ssop package ltc2902 programmable quad supply monitor adjustable reset and tolerance, 16-lead ssop package, margining functions ltc2903 precision quad supply monitor 6-lead sot-23 package, ultralow voltage reset ltc2904 three-state programmable precision dual supply monitor adjustable tolerance, 8-lead sot-23 package ltc2905 three-state programmable precision dual supply monitor adjustable reset and tolerance, 8-lead sot-23 package ltc2906 precision dual supply monitor 1 selectable and 1 adjustable separate v cc pin, rst/ rst outputs ltc2907 precision dual supply monitor 1 selectable and 1 adjustable separate v cc , adjustable reset timer ltc2908 precision six supply monitor 8-lead tsot-23 and 3mm 2mm dfn packages ltc2909 precision dual input uv, ov and negative voltage monitor separate v cc pin, adjustable reset timer, 8-lead tsot-23 and 3mm 2mm dfn packages related parts typical application vh1 v cc ltc2914-1 system 2914 ta06 0.1 f gnd tmr vl1 vl2 vh2 ref vl3 vh3 ov uv latch sel vl4 c tmr 22nf timeout = 200ms vh4 10k 100k manual reset button (normally open) 4.53k 1k 2.05m 19.6k 4.53k 27.4k 510 led 1k 44.2k 12v 5v 3.3v 2.5v 1k 4.53k p0wer supplies 510 led

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